请教一下内核体系的问题？（不知道这种说法对不对）

[immortalcuckoo]

听说过不少关于体系的名词
比如：
MIPS,X86,等等
1，现在使用三星的S3c2410 的arm 芯片，不知道是属于什么体系？
2，arm是不是也是一种体系？
3，MC9328MX21是什么体系？
4，体系和内核有什么联系呢？
谢谢先

[lunarking]

1，现在使用三星的S3c2410 的arm 芯片，不知道是属于什么体系？
arm体系
2，arm是不是也是一种体系？
是
3，MC9328MX21是什么体系？
arm
4，体系和内核有什么联系呢？
看问题的两个方面。

[xqxxl]

1，现在使用三星的S3c2410 的arm 芯片，不知道是属于什么体系？
ARM7,无内存管理单元nommu
2，arm是不是也是一种体系？
一种CPU体系结构，也是一种标准，ARM公司自己不生产芯片，只是技术转让，有三星，Intel等厂家
3，MC9328MX21是什么体系？
ARM9
4，体系和内核有什么联系呢？
体系只是指示CPU架构，能执行的CPU指令，内核指示操作系统，是让操作系统兼容CPU，不是让CPU来兼容操作系统，linux已经兼容了现流行的很多CPU架构，如X86，mips，ARM，alpha等。

[joyself]

如上所说：
ARCH（architecture）和MACH（machine）的区别

架构 ARCH： arm，mips,ppc,x86 等等
MACH： mx21，pxa，s3c2410,等等


有源代码的话可以看：
include/asm-<ARCH>
arch/arm/mach-<MACH>

以arm为例：
include/asm-arm
arch/arm/mach-imx


额外说明：
不同的厂商有不同的cpu，但都是基于arm 的core。 像上面的 mx21是Freescale的，
pxa原来是intel的，现在是marvell，s3c2410则是三星的。

[joyself]

纠正上面应为
-------------------
有源代码的话可以看：
include/asm-<ARCH>
arch/<ARCH>/mach-<MACH>
-------------------

[immortalcuckoo]

不是阿，s3c2410带mmu 的阿，有地址映射的
还有不是很明白arm7 和arm9的区别，是不是就是是否有mmu 的区别？
谢谢这么多大虾的回帖

[joyself]

ARM Architectures, Families, and CPU Cores
RISC processors employ fixed length instructions. The ARM instruction set is defined
by a particular version of the ARM architecture. Each specific ARM CPU core
implements a specific architecture version. The ARM architecture dates all the way
back to version 1 that corresponds to the first design developed at Acorn. Here are
the primary architecture versions used in recent processor families:
Figure 3-1: RISC shipments from 1994 to 2001
72
Chapter 3
■ ARMv4T
■ ARMv5T
■ ARMv5TE
■ ARMv5TEJ
■ ARMv6
There are four families of ARM processors currently being used in new SoC designs:
■ ARM7 family uses ARMv4T
■ ARM9 family uses ARMv4T, ARMv5TE and the ARMv5TEJ
■ ARM10 family uses ARMv5T, ARMv5TE and the ARMv5TEJ
■ ARM11 family uses ARMv6


There are many ARM processors that are actively being used in new designs today.
Following is a list of the most common variants and the highlights of each:
■ ARM7TDMI: Developed in 1995, it is still one of the most popular today.
Uses a three-stage pipeline and the v4T architecture to provide good performance
and very low power and small size. It’s available as both a hard and soft
macrocell.
■ ARM720T: Includes the ARM7TDMI core plus an 8k unified (instruction
and data) cache, MMU, and write buffer and can run operating systems such
as Windows CE and Symbian OS. Available as a hard macrocell.
■ ARM9TDMI: An upgrade to the ARM7TDMI that uses the same v4T
architecture, but moves to a five-stage pipeline and Harvard architecture.
Available as a hard macrocell.
■ ARM940T: Includes the ARM9TDMI core plus dual 4k caches (separate
instruction and data) and an MPU that supports most real-time operating
systems. Available as a hard macrocell.
■ ARM920T / ARM922T: Includes the ARM9TDMI core plus dual 16k
caches for ARM920T and dual 8k caches for ARM922T. Other than cache
size they are identical. Both support operating systems like Windows CE,
Symbian OS, PalmOS and Linux. Available as hard macrocells.
■ ARM9E-S: Uses a five-stage pipeline to support the v5TE architecture that
includes an enhanced multiplier for improved DSP performance. Available as
a soft macrocell. Represents the first shift to synthesizable CPU cores.
■ ARM966E-S: Includes an ARM9E-S CPU and instruction and data tightly
coupled memory (TCM). Targets “hard” real-time embedded applications, no
caches or MPU/MMU. Available as a soft macrocell.
■ ARM946E-S: Adds user configurable instruction and data caches and MPU
to the ARM966E-S. Supports popular real-time operating systems.
■ ARM9EJ-S: Adds Jazelle Java technology to the ARM9E-S core to support
the v5TEJ architecture. Available as a soft macrocell.
■ ARM926EJ-S: Includes the ARM9EJ-S core and instruction cache, data
cache and MMU. Supports operating systems such as Windows CE, Symbian
OS, PalmOS and Linux. Available as a soft macrocell. The most popular
ARM9 core.
■ ARM1020E / ARM1022E: Combines the ARM10E integer core with sixstage
pipeline with DSP extensions and supports the v5TE architecture with
instruction and data caches and MMU. Supports operating systems such as
Windows CE, Symbian OS, PalmOS and Linux. First design to use 64-bit internal
data paths and 64-bit external data buses. ARM1020E and ARM1022E
are identical except for cache sizes. ARM1020E is 32k/32k and ARM1022E is
16k/16k. Available as a hard macrocell.
■ ARM1026EJ-S: Combines the ARM10EJ integer core with six-stage
pipeline, DSP instructions, Jazelle technology and supports the v5TEJ architecture
with instruction and data caches, MMU and instruction and data
TCM. Fully synthesizable design that allows cache sizes and external bus
widths to be configured by the user. Capable of running all operating systems.
Available as a soft macrocell.
■ ARM1136J-S: Represents the first implementation of the v6 architecture
(some 80+ new instructions) with eight-stage pipeline. The highest performance
processor with