VHDL integer装换为real的问题
我想转换integer类型的信号为real类型
程序如下。
这段程序在maxplus II报错:
file standard.vhdl:Unsupported feature error:floating is not supported
在quartus II中报错:
Error (10414): VHDL error at yuvtorgb.vhd(22), at object "red": a real cannot be non-constant
程序如下,请教各位大虾:
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
USE IEEE.STD_LOGIC_ARITH.ALL;
entity yuvtorgb is
port(
RAM_DBUS : in std_logic_vector(7 downto 0);
y2_select : in std_logic;
indata_v : in std_logic_vector(7 downto 0);
indata_y1 : in std_logic_vector(7 downto 0);
indata_u : in std_logic_vector(7 downto 0);
indata_y2 : in std_logic_vector(7 downto 0);
test: out std_logic
);
end entity;
architecture a of yuvtorgb is
signal data_v : INTEGER;
signal data_y1 : INTEGER;
signal data_u : INTEGER;
signal data_y2 : INTEGER;
signal red : real range 0.0 to 1000.0 :=10.0;
signal green : real;
signal blue : real;
signal addred : std_logic_vector(18 downto 0);
signal lcdpixel_num : integer range 0 to 2570;
signal pickup_tmp : std_logic;
begin
test<='1';
data_v<=conv_integer(indata_v);
data_y1<=conv_integer(indata_y1);
data_u<=conv_integer(indata_u);
data_y2<=conv_integer(indata_y2);
process(y2_select)
begin
if(y2_select'event and y2_select='0') then
red<=real(data_y1);
--red=1.164 * (data_y1 - 16) + 1.596 * (data_v - 128);
--green=1.164 * (data_y1 - 16) - 0.813 * (data_v - 128) - 0.392 * (data_u - 128);
--blue=1.164 * (data_y1 - 16) + 2.017 * (data_u - 128);
end if;
end process;
--
end a;