哪位能帮我看下这段VHDL程序,在线等
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity dis is
PORT( o1:IN STD_LOGIC_VECTOR(3 downto 0);
o2:IN STD_LOGIC_VECTOR(3 downto 0);
o3:IN STD_LOGIC_VECTOR(3 downto 0); --十进制BCD码输入
dis_clk,k,clr:IN STD_LOGIC;
-- dis_clk为显示扫描时钟,k为量程控制信号,clr为复位信号
o:BUFFER STD_LOGIC_VECTOR(3 downto 0);
dis_ctrl:OUT STD_LOGIC_VECTOR(2 downto 0); --显示控制信号
dis_s:OUT STD_LOGIC_VECTOR(6 downto 0); --数码管译码值
dot:OUT STD_LOGIC_VECTOR(2 downto 0)); --显示小数点位
end dis;
architecture Behavioral of dis is
signal i: STD_LOGIC_VECTOR(1 downto 0);
begin
process(dis_clk)
begin
if clr='0' --复位
then o<=X"0";
dis_ctrl<="000";
dis_s<="0000000";
dot<="111";
i<="00";
else
if dis_clk'event and dis_clk='1'
then
if i="10"
then i<="00";
else i<=i+1;
end if;
case i is --3个数码管依次显示
when "00" => o<=o1;dis_ctrl<="100";
when "01" => o<=o2;dis_ctrl<="010";
when "10" => o<=o3;dis_ctrl<="001";
when others => o<=X"0";dis_ctrl<="000";
end case ;
if k='0' --显示小数点位置
then dot<="001";
else dot<="100";
end if;
case o is --数码管译码值
when X"0" => dis_s<="1000000";
when X"1" => dis_s<="1111001";
when X"2" => dis_s<="0100100";
when X"3" => dis_s<="0110000";
when X"4" => dis_s<="0011001";
when X"5" => dis_s<="0010010";
when X"6" => dis_s<="0000011";
when X"7" => dis_s<="1111000";
when X"8" => dis_s<="0000000";
when X"9" => dis_s<="0011000";
when others => dis_s<="0000000";
end case;
end if;
end if;
end process;
end Behavioral;