at91sam9g45的WINCE系统起不来

qihui888888 2013-07-31 10:51:46
大家好!我是嵌入式新手,在调试AT91SAM9G45时碰到系统起不来问题,只出来WINCE log,然后LCD黑下去,打印I2C erro

INFO : Low Level Init : OK
INFO : DDRam init : OK
Init Nand flash
Load CE-BOOT from Flash to DDRAM
Starting eboot ...
Debug serial initialized ........OK

Microsoft Windows CE Bootloader Common Library Version 1.4 Built Jul 31 2013 19:59:50
Microsoft Windows CE 6.0 Ethernet Bootloader for the AT91SAM926xEK board
Adaptation performed by ADENEO (c) 2007


Debug serial initialized ........OK
---------------------------------------
--- Configuring Chip Select 3 ---
---------------------------------------
--- Desired timings ---
---------------------------------------
dwNWE_SETUP 16
dwNCS_WR_SETUP 0
dwNRD_SETUP 16
dwNCS_RD_SETUP 0
dwNWE_PULSE 32
dwNCS_WR_PULSE 32
dwNRD_PULSE 32
dwNCS_RD_PULSE 32
dwNRD_CYCLE 56
dwNWE_CYCLE 56
dwClockPeriod_ns 8
---------------------------------------
--- Real timings ---
---------------------------------------
dwNWE_SETUP 16
dwNCS_WR_SETUP 0
dwNRD_SETUP 16
dwNCS_RD_SETUP 0
dwNWE_PULSE 32
dwNCS_WR_PULSE 32
dwNRD_PULSE 32
dwNCS_RD_PULSE 32
dwNRD_CYCLE 56
dwNWE_CYCLE 56
Found Smug (0xec)- K9F2G08U0A (0xda)
---------------------------------------
--- Configuring Chip Select 3 ---
---------------------------------------
--- Desired timings ---
---------------------------------------
dwNWE_SETUP 16
dwNCS_WR_SETUP 0
dwNRD_SETUP 16
dwNCS_RD_SETUP 0
dwNWE_PULSE 32
dwNCS_WR_PULSE 32
dwNRD_PULSE 32
dwNCS_RD_PULSE 32
dwNRD_CYCLE 56
dwNWE_CYCLE 56
dwClockPeriod_ns 8
---------------------------------------
--- Real timings ---
---------------------------------------
dwNWE_SETUP 16
dwNCS_WR_SETUP 0
dwNRD_SETUP 16
dwNCS_RD_SETUP 0
dwNWE_PULSE 32
dwNCS_WR_PULSE 32
dwNRD_PULSE 32
dwNCS_RD_PULSE 32
dwNRD_CYCLE 56
dwNWE_CYCLE 56
Using Software ECC
FMD_DirectRead lasted 1 ms for 0x62 bytes (timer granularity is 400)
WARNING : LoadEBootCFG: No valid Eboot configuration found.
INFO : Loading default bootloader settings

Press [ENTER] to launch image stored in flash or [SPACE] to cancel.
Initiating image launch in 0 seconds
System ready!
Preparing for download...
dwFlashLogicalAddress: e0200000
OK
FMD_DirectRead lasted 9994 ms for 0x2000000 bytes (timer granularity is 400)
Launching windows CE image by jumping at address 0x70195000Windows CE Kernel for ARM (Thumb Enabled) Built on Sep 30 2007 at 22:37:06
Windows CE Firmware Init
BSP 1.4.0 for the AT91SAM9G45M10EK board (built Jul 31 2013)
Adaptation performed by ADENEO (c) 2005
+OALIntrInit
+SOCPioIntrInit()
-SOCPioIntrInit()
-OALIntrInit(rc = 1)
Initialize driver globals Zeros area...
pDrvGlobalArea 0x80193000 size 0x800 (0x80193800 -0x80193000)
Initialize driver globals Zeros area...done
-------------------
|PLLA : 399974400 Hz|
--------------------
OALTimerInit
+OALTimerInit
Test : 0x208c
g_oalTimer.msecPerSysTick : 0x1
g_oalTimer.countsPerMSec : 0x208c
g_oalTimer.countsMargin : 0x0
g_oalTimer.maxPeriodMSec : 0x7c
g_oalTimer.countsPerSysTick : 0x208c
g_oalTimer.actualMSecPerSysTick : 0x1
g_oalTimer.actualCountsPerSysTick : 0x208c
g_oalTimer.curCounts : 0x0
-OALTimerInit
reset : Watchdog Reset
pDrvGlobalArea->bEboot == TRUE. Forcing Clean Object store
+OEMPowerManagerInit
-OEMPowerManagerInit
OALKitlStart
Firmware Init Done.
+OEMInitWatchDogTimer
AT91SAM926x_DispWatchDog 3fff2fff!
AT91SAM926x_SetWatchDogConfiguration 20000 => 5120
Clipping The Watchdog period to the maximum : 0xFFF (15996 ms)
-OEMInitWatchDogTimer (result = 15996)
+OALIoCtlHalInitRTC(...)
setrealtime 3062694400
-OALIoCtlHalInitRTC(rc = 1)
---------------------------------------
--- Configuring Chip Select 3 ---
---------------------------------------
--- Desired timings ---
---------------------------------------
dwNWE_SETUP 16
dwNCS_WR_SETUP 0
dwNRD_SETUP 16
dwNCS_RD_SETUP 0
dwNWE_PULSE 32
dwNCS_WR_PULSE 32
dwNRD_PULSE 32
dwNCS_RD_PULSE 32
dwNRD_CYCLE 56
dwNWE_CYCLE 56
dwClockPeriod_ns 8
---------------------------------------
--- Real timings ---
---------------------------------------
dwNWE_SETUP 16
dwNCS_WR_SETUP 0
dwNRD_SETUP 16
dwNCS_RD_SETUP 0
dwNWE_PULSE 32
dwNCS_WR_PULSE 32
dwNRD_PULSE 32
dwNCS_RD_PULSE 32
dwNRD_CYCLE 56
dwNWE_CYCLE 56
Found Smug (0xec)- K9F2G08U0A (0xda)
---------------------------------------
--- Configuring Chip Select 3 ---
---------------------------------------
--- Desired timings ---
---------------------------------------
dwNWE_SETUP 16
dwNCS_WR_SETUP 0
dwNRD_SETUP 16
dwNCS_RD_SETUP 0
dwNWE_PULSE 32
dwNCS_WR_PULSE 32
dwNRD_PULSE 32
dwNCS_RD_PULSE 32
dwNRD_CYCLE 56
dwNWE_CYCLE 56
dwClockPeriod_ns 8
---------------------------------------
--- Real timings ---
---------------------------------------
dwNWE_SETUP 16
dwNCS_WR_SETUP 0
dwNRD_SETUP 16
dwNCS_RD_SETUP 0
dwNWE_PULSE 32
dwNCS_WR_PULSE 32
dwNRD_PULSE 32
dwNCS_RD_PULSE 32
dwNRD_CYCLE 56
dwNWE_CYCLE 56
Using Software ECC
SPIDriver - DLL_PROCESS_ATTACH
+CUSBHSFN::Init()
UDPHS IT: Thread started-CUSBHSFN::Init()
+CUSBHSFN::InitEndpoint(0)
-CUSBHSFN::InitEndpoint(0)
IOControl IOCTL_BUS_GET_POWER_STATE(D0)
PWM Driver: DLL_PROCESS_ATTACH
PLLA Clock is 399974400 Hz
I2C Error: AT91C_TWI_NACK
I2C Error: AT91C_TWI_NACK
I2C Error: AT91C_TWI_NACK
I2C Error: AT91C_TWI_NACK
I2C Error: AT91C_TWI_NACK
I2C Error: AT91C_TWI_NACK
I2C Error: AT91C_TWI_NACK
I2C Error: AT91C_TWI_NACK
I2C Error: AT91C_TWI_NACK
I2C Error: AT91C_TWI_NACK
I2C Error: AT91C_TWI_NACK
I2C Error: AT91C_TWI_NACK
Display mode #0, 800x480x16bpp @ 0hz
Frame buffer is Uncached
Config2DEngine
cable attached
...全文
464 4 打赏 收藏 转发到动态 举报
写回复
用AI写文章
4 条回复
切换为时间正序
请发表友善的回复…
发表回复
中国168 2013-08-12
  • 打赏
  • 举报
回复
会不是是显示部分出了问题,可以尝试做个简单的demo系统,看看板卡能否启动。 看看硬件有没有问题,或者直接先少个开发板的系统看看,进行硬件检测!
xqhrs232 2013-08-11
  • 打赏
  • 举报
回复
Display mode #0, 800x480x16bpp @ 0hz??? 为什么是0hz???
qihui888888 2013-08-02
  • 打赏
  • 举报
回复
i2C错误已经解决,把AUDIO部分软甲屏蔽了。但是系统还是启动不了。我电源是一起上的,我看过几个设计,好像电源这里要求不高,什么时序都有。 INFO : Low Level Init : OK INFO : DDRam init : OK Init Nand flash Load CE-BOOT from Flash to DDRAM Starting eboot ... Debug serial initialized ........OK Microsoft Windows CE Bootloader Common Library Version 1.4 Built Aug 1 2013 19:51:20 Microsoft Windows CE 6.0 Ethernet Bootloader for the AT91SAM926xEK board Adaptation performed by ADENEO (c) 2007 Debug serial initialized ........OK --------------------------------------- --- Configuring Chip Select 3 --- --------------------------------------- --- Desired timings --- --------------------------------------- dwNWE_SETUP 16 dwNCS_WR_SETUP 0 dwNRD_SETUP 16 dwNCS_RD_SETUP 0 dwNWE_PULSE 32 dwNCS_WR_PULSE 32 dwNRD_PULSE 32 dwNCS_RD_PULSE 32 dwNRD_CYCLE 56 dwNWE_CYCLE 56 dwClockPeriod_ns 8 --------------------------------------- --- Real timings --- --------------------------------------- dwNWE_SETUP 16 dwNCS_WR_SETUP 0 dwNRD_SETUP 16 dwNCS_RD_SETUP 0 dwNWE_PULSE 32 dwNCS_WR_PULSE 32 dwNRD_PULSE 32 dwNCS_RD_PULSE 32 dwNRD_CYCLE 56 dwNWE_CYCLE 56 Found Smug (0xec)- K9F2G08U0A (0xda) --------------------------------------- --- Configuring Chip Select 3 --- --------------------------------------- --- Desired timings --- --------------------------------------- dwNWE_SETUP 16 dwNCS_WR_SETUP 0 dwNRD_SETUP 16 dwNCS_RD_SETUP 0 dwNWE_PULSE 32 dwNCS_WR_PULSE 32 dwNRD_PULSE 32 dwNCS_RD_PULSE 32 dwNRD_CYCLE 56 dwNWE_CYCLE 56 dwClockPeriod_ns 8 --------------------------------------- --- Real timings --- --------------------------------------- dwNWE_SETUP 16 dwNCS_WR_SETUP 0 dwNRD_SETUP 16 dwNCS_RD_SETUP 0 dwNWE_PULSE 32 dwNCS_WR_PULSE 32 dwNRD_PULSE 32 dwNCS_RD_PULSE 32 dwNRD_CYCLE 56 dwNWE_CYCLE 56 Using Software ECC FMD_DirectRead lasted 1 ms for 0x62 bytes (timer granularity is 400) WARNING : LoadEBootCFG: No valid Eboot configuration found. INFO : Loading default bootloader settings Press [ENTER] to launch image stored in flash or [SPACE] to cancel. Initiating image launch in 0 seconds System ready! Preparing for download... dwFlashLogicalAddress: e0200000 OK FMD_DirectRead lasted 9916 ms for 0x2000000 bytes (timer granularity is 400) Launching windows CE image by jumping at address 0x70195000Windows CE Kernel for ARM (Thumb Enabled) Built on Sep 30 2007 at 22:37:06 Windows CE Firmware Init BSP 1.4.0 for the AT91SAM9G45M10EK board (built Aug 1 2013) Adaptation performed by ADENEO (c) 2005 +OALIntrInit +SOCPioIntrInit() -SOCPioIntrInit() -OALIntrInit(rc = 1) Initialize driver globals Zeros area... pDrvGlobalArea 0x80193000 size 0x800 (0x80193800 -0x80193000) Initialize driver globals Zeros area...done ------------------- |PLLA : 400042600 Hz| -------------------- OALTimerInit +OALTimerInit Test : 0x208e g_oalTimer.msecPerSysTick : 0x1 g_oalTimer.countsPerMSec : 0x208e g_oalTimer.countsMargin : 0x0 g_oalTimer.maxPeriodMSec : 0x7c g_oalTimer.countsPerSysTick : 0x208e g_oalTimer.actualMSecPerSysTick : 0x1 g_oalTimer.actualCountsPerSysTick : 0x208e g_oalTimer.curCounts : 0x0 -OALTimerInit reset : Wakeup Reset pDrvGlobalArea->bEboot == TRUE. Forcing Clean Object store +OEMPowerManagerInit -OEMPowerManagerInit OALKitlStart Firmware Init Done. +OEMInitWatchDogTimer AT91SAM926x_DispWatchDog 3fff2fff! AT91SAM926x_SetWatchDogConfiguration 20000 => 5120 Clipping The Watchdog period to the maximum : 0xFFF (15996 ms) -OEMInitWatchDogTimer (result = 15996) +OALIoCtlHalInitRTC(...) -OALIoCtlHalInitRTC(rc = 0) --------------------------------------- --- Configuring Chip Select 3 --- --------------------------------------- --- Desired timings --- --------------------------------------- dwNWE_SETUP 16 dwNCS_WR_SETUP 0 dwNRD_SETUP 16 dwNCS_RD_SETUP 0 dwNWE_PULSE 32 dwNCS_WR_PULSE 32 dwNRD_PULSE 32 dwNCS_RD_PULSE 32 dwNRD_CYCLE 56 dwNWE_CYCLE 56 dwClockPeriod_ns 8 --------------------------------------- --- Real timings --- --------------------------------------- dwNWE_SETUP 16 dwNCS_WR_SETUP 0 dwNRD_SETUP 16 dwNCS_RD_SETUP 0 dwNWE_PULSE 32 dwNCS_WR_PULSE 32 dwNRD_PULSE 32 dwNCS_RD_PULSE 32 dwNRD_CYCLE 56 dwNWE_CYCLE 56 Found Smug (0xec)- K9F2G08U0A (0xda) --------------------------------------- --- Configuring Chip Select 3 --- --------------------------------------- --- Desired timings --- --------------------------------------- dwNWE_SETUP 16 dwNCS_WR_SETUP 0 dwNRD_SETUP 16 dwNCS_RD_SETUP 0 dwNWE_PULSE 32 dwNCS_WR_PULSE 32 dwNRD_PULSE 32 dwNCS_RD_PULSE 32 dwNRD_CYCLE 56 dwNWE_CYCLE 56 dwClockPeriod_ns 8 --------------------------------------- --- Real timings --- --------------------------------------- dwNWE_SETUP 16 dwNCS_WR_SETUP 0 dwNRD_SETUP 16 dwNCS_RD_SETUP 0 dwNWE_PULSE 32 dwNCS_WR_PULSE 32 dwNRD_PULSE 32 dwNCS_RD_PULSE 32 dwNRD_CYCLE 56 dwNWE_CYCLE 56 Using Software ECC SPIDriver - DLL_PROCESS_ATTACH +CUSBHSFN::Init() UDPHS IT: Thread started-CUSBHSFN::Init() +CUSBHSFN::InitEndpoint(0) -CUSBHSFN::InitEndpoint(0) IOControl IOCTL_BUS_GET_POWER_STATE(D0) PWM Driver: DLL_PROCESS_ATTACH Display mode #0, 800x480x16bpp @ 0hz Frame buffer is Uncached Config2DEngine cable attached
91program 2013-08-01
  • 打赏
  • 举报
回复
看看电源的驱动吧,是否是 I2C 实现的?
EB-SAM9G45(原称EM-SAM9G45)开发板是英蓓特公司新推出的一款基 于ATMEL公司AT91SAM9G45处理器(ARM926EJ-S内核)的全功能评估板。SAM9G45开发板主频高达400MHz,可支持 WinCE和Linux操作系统的开发板调试,带有256MB NandFlash,2MB NorFlash,512KB EEPROM,4MB DataFlash,以及2个64MB的DDR2 SDRAM,并带有丰富的功能扩展:高速USB2.0(480MHz),音频输入,音频输出, 10/100Mbps网络,JTAG调试接口,DBGU串口,Micro SD卡接口,SD/MMC卡接口,CMOS摄像头接口,支持8位/12位视频数据采集。 芯片说明: AT91SAM9G45芯片使用ARM926EJ-S内核,它带有MMU功能,有一个64KB的内部SRAM和一个64KB的内部ROM,并带有两 个外部 总线接口,总共可支持4块DDR2/LPDDR,SDRAM/LPSDR,静态存储器,CF闪存或带ECC校验的SLC NAND Flash。 AT91SAM9G45芯片把用户接口的功能性和高速数据连接相结合,包括LCD控制器,电阻触摸屏,相机接口,音频,10/100M以太网,高速USB 和SDIO等等。随着处理器运行在400MHz和多个速率超过100Mbps的外设,AT91SAM9G45使用高性能和带宽网络或本地存储媒体来提供良 好的用户体验。 AT91SAM9G45支持最新的DDR2和NAND闪存接口来存储程序和数据。一个与37个DMA通道相关的133M的内部多层总线接口,以及一个双外 部总线接口,和一个能够用来配置紧密耦合内存(TCM)的64K字节的分布式内存,它们用来维持处理器和高速外设通信时所需的带宽。 AT91SAM9G45的电源管理控制器具有高效的时钟门控和电池备份部分,在上电和待机模式时将功耗降低至最少。

19,502

社区成员

发帖
与我相关
我的任务
社区描述
硬件/嵌入开发 嵌入开发(WinCE)
社区管理员
  • 嵌入开发(WinCE)社区
加入社区
  • 近7日
  • 近30日
  • 至今
社区公告
暂无公告

试试用AI创作助手写篇文章吧