VHDL 读写片外RAM

tang632946309 2014-08-07 09:36:08
library IEEE;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity project1 is
port(
inbus: in std_logic_vector(15 downto 0);
data: inout std_logic_vector(7 downto 0);
wr: in std_logic;
rd: in std_logic;

ale: in std_logic;
enable: in std_logic;
reset: in std_logic;

int0: buffer std_logic;
xin: in std_logic;
xout: out std_logic;
scanner_out:out std_logic;
scanner_in: in std_logic
);
end project1;

architecture VER1 of project1 is

signal data_buf: std_logic_vector(7 downto 0);
signal out_buf: std_logic_vector(7 downto 0);
signal latch_buf: std_logic_vector(5 downto 0);
signal result_buf0: std_logic_vector(27 downto 0);
signal result_buf1: std_logic_vector(27 downto 0);
signal result_buf2: std_logic_vector(27 downto 0);
signal result_buf3: std_logic_vector(27 downto 0);
signal result_buf4: std_logic_vector(27 downto 0);
signal result_buf5: std_logic_vector(27 downto 0);
signal result_buf6: std_logic_vector(27 downto 0);
signal result_buf7: std_logic_vector(27 downto 0);
signal result_buf8: std_logic_vector(27 downto 0);
signal result_buf9: std_logic_vector(27 downto 0);
signal result_buf10: std_logic_vector(27 downto 0);
signal result_buf11: std_logic_vector(27 downto 0);
signal result_buf12: std_logic_vector(27 downto 0);
signal result_buf13: std_logic_vector(27 downto 0);
signal result_buf14: std_logic_vector(27 downto 0);
signal result_buf15: std_logic_vector(27 downto 0);

signal time_cnt: std_logic_vector(27 downto 0);
--signal time_ref: std_logic_vector(27 downto 0);
signal start_flag: std_logic;
begin

--xout <= not (xin);
scanner_out <= scanner_in;
latch_addr:process(ale) -- address latcher
begin
if(ale='0') then
latch_buf <= data(5 downto 0);
end if;
end process latch_addr;

read_data:process(rd) -- read test data
--variable addr: std_logic_vector(1 downto 0);
variable tmp: std_logic_vector(27 downto 0);
begin
-- addr := latch_buf(1 downto 0);
-- if(reset = '0') then
-- start_flag <= '0';
-- data <= "ZZZZZZZZ";
if(rd = '0') then
case latch_buf(5 downto 2) is
when X"0" => tmp := result_buf0;
when X"1" => tmp := result_buf1;
when X"2" => tmp := result_buf2;
when X"3" => tmp := result_buf3;
when X"4" => tmp := result_buf4;
when X"5" => tmp := result_buf5;
when X"6" => tmp := result_buf6;
when X"7" => tmp := result_buf7;
when X"8" => tmp := result_buf8;
when X"9" => tmp := result_buf9;
when X"A" => tmp := result_buf10;
when X"B" => tmp := result_buf11;
when X"C" => tmp := result_buf12;
when X"D" => tmp := result_buf13;
when X"E" => tmp := result_buf14;
when X"F" => tmp := result_buf15;
end case;

if(latch_buf(1 downto 0) = "11") then
data <= tmp(7 downto 0);
elsif(latch_buf(1 downto 0) = "10") then
data <= tmp(15 downto 8);
elsif(latch_buf(1 downto 0) = "01") then
data <= tmp(23 downto 16);
else
data(3 downto 0) <= tmp(27 downto 24);
data(7 downto 4) <= "0000";

end if;

else
data <= "ZZZZZZZZ";
end if;
end process read_data;

-- Test event -> will change "int0"
TEST_END_EVENT: PROCESS (xin, reset)
CONSTANT time_refa :std_logic_vector(27 downto 0):=X"16E368C";
BEGIN
IF( reset = '0') THEN
int0 <= '1';
time_cnt <= X"0000000";
ELSIF((xin'event) and (xin = '1')) then
time_cnt <= time_cnt + 1;
IF(time_cnt = time_refa) THEN
int0 <= '0';
END IF;
END IF;
END PROCESS TEST_END_EVENT;

-- input counter
IN0:PROCESS (inbus(0))
BEGIN
IF( reset = '0') THEN
result_buf0 <= X"0000000";
ELSIF ( (inbus(0)'event) and (inbus(0) = '1')) THEN
IF(int0='1') THEN
result_buf0 <= result_buf0 + 1;
END IF;
END IF;

END PROCESS IN0;

-- input counter
IN1:PROCESS (inbus(1))
BEGIN
IF( reset = '0') THEN
result_buf1 <= X"0000000";
ELSIF ( (inbus(1)'event) and (inbus(1) = '1')) THEN
IF(int0='1') THEN
result_buf1 <= result_buf1 + 1;
END IF;
END IF;

END PROCESS IN1;


-- input counter
IN2:PROCESS (inbus(2))
BEGIN
IF( reset = '0') THEN
result_buf2 <= X"0000000";
ELSIF ( (inbus(2)'event) and (inbus(2) = '1')) THEN
IF(int0='1') THEN
result_buf2 <= result_buf2 + 1;
END IF;
END IF;

END PROCESS IN2;


-- input counter
IN3:PROCESS (inbus(3))
BEGIN
IF( reset = '0') THEN
result_buf3 <= X"0000000";
ELSIF ( (inbus(3)'event) and (inbus(3) = '1')) THEN
IF(int0='1') THEN
result_buf3 <= result_buf3 + 1;
END IF;
END IF;

END PROCESS IN3;


-- input counter
IN4:PROCESS (inbus(4))
BEGIN
IF( reset = '0') THEN
result_buf4 <= X"0000000";
ELSIF ( (inbus(4)'event) and (inbus(4) = '1')) THEN
IF(int0='1') THEN
result_buf4 <= result_buf4 + 1;
END IF;
END IF;

END PROCESS IN4;


-- input counter
IN5:PROCESS (inbus(5))
BEGIN
IF( reset = '0') THEN
result_buf5 <= X"0000000";
ELSIF ( (inbus(5)'event) and (inbus(5) = '1')) THEN
IF(int0='1') THEN
result_buf5 <= result_buf5 + 1;
END IF;
END IF;

END PROCESS IN5;


-- input counter
IN6:PROCESS (inbus(6))
BEGIN
IF( reset = '0') THEN
result_buf6 <= X"0000000";
ELSIF ( (inbus(6)'event) and (inbus(6) = '1')) THEN
IF(int0='1') THEN
result_buf6 <= result_buf6 + 1;
END IF;
END IF;

END PROCESS IN6;


-- input counter
IN7:PROCESS (inbus(7))
BEGIN
IF( reset = '0') THEN
result_buf7 <= X"0000000";
ELSIF ( (inbus(7)'event) and (inbus(7) = '1')) THEN
IF(int0='1') THEN
result_buf7 <= result_buf7 + 1;
END IF;
END IF;

END PROCESS IN7;

-- input counter
IN8:PROCESS (inbus(8))
BEGIN
IF( reset = '0') THEN
result_buf8 <= X"0000000";
ELSIF ( (inbus(8)'event) and (inbus(8) = '1')) THEN
IF(int0='1') THEN
result_buf8 <= result_buf8 + 1;
END IF;
END IF;

END PROCESS IN8;

-- input counter
IN9:PROCESS (inbus(9))
BEGIN
IF( reset = '0') THEN
result_buf9 <= X"0000000";
ELSIF ( (inbus(9)'event) and (inbus(9) = '1')) THEN
IF(int0='1') THEN
result_buf9 <= result_buf9 + 1;
END IF;
END IF;

END PROCESS IN9;

-- input counter
IN10:PROCESS (inbus(10))
BEGIN
IF( reset = '0') THEN
result_buf10 <= X"0000000";
ELSIF ( (inbus(10)'event) and (inbus(10) = '1')) THEN
IF(int0='1') THEN
result_buf10 <= result_buf10 + 1;
END IF;
END IF;

END PROCESS IN10;

-- input counter
IN11:PROCESS (inbus(11))
BEGIN
IF( reset = '0') THEN
result_buf11 <= X"0000000";
ELSIF ( (inbus(11)'event) and (inbus(11) = '1')) THEN
IF(int0='1') THEN
result_buf11 <= result_buf11 + 1;
END IF;
END IF;

END PROCESS IN11;

-- input counter
IN12:PROCESS (inbus(12))
BEGIN
IF( reset = '0') THEN
result_buf12 <= X"0000000";
ELSIF ( (inbus(12)'event) and (inbus(12) = '1')) THEN
IF(int0='1') THEN
result_buf12 <= result_buf12 + 1;
END IF;
END IF;

END PROCESS IN12;

-- input counter
IN13:PROCESS (inbus(13))
BEGIN
IF( reset = '0') THEN
result_buf13 <= X"0000000";
ELSIF ( (inbus(13)'event) and (inbus(13) = '1')) THEN
IF(int0='1') THEN
result_buf13 <= result_buf13 + 1;
END IF;
END IF;

END PROCESS IN13;

-- input counter
IN14:PROCESS (inbus(14))
BEGIN
IF( reset = '0') THEN
result_buf14 <= X"0000000";
ELSIF ( (inbus(14)'event) and (inbus(14) = '1')) THEN
IF(int0='1') THEN
result_buf14 <= result_buf14 + 1;
END IF;
END IF;

END PROCESS IN14;

-- input counter
IN15:PROCESS (inbus(15))
BEGIN
IF( reset = '0') THEN
result_buf15 <= X"0000000";
ELSIF ( (inbus(15)'event) and (inbus(15) = '1')) THEN
IF(int0='1') THEN
result_buf15 <= result_buf15 + 1;
END IF;
END IF;

END PROCESS IN15;


end VER1;
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