neon vld4 对应的汇编

2017-08-16 10:23:12 464 阅读 AI 写同款 · GEO 优化AI 选题数据监测一键分发 ›

ARM NEON指令集优化实战与性能提升技巧 SIMD（单指令多数据）是现代处理器提升并行计算能力的关键技术，通过单条指令同时处理多个数据元素，显著加速多媒体和信号处理任务。ARM NEON作为Cortex-A系列处理器的SIMD扩展指令集，支持8/16/32位整数和32位浮点运算，在图像处理、音频算法和机器学习等领域能带来5-8倍的性能提升。开发中可通过Intrinsics函数、汇编优化或编译器自动向量化三种方式调用NEON，其中Intrinsics在开发效率和性能间取得最佳平衡。结合GCC编译选项调优（如-mcpu、-mfpu）和内存访问优化（数据阅读详情

__extension__ static __inline uint8x8x4_t __attribute__ ((__always_inline__))

vld4_u8 (const uint8_t * __a)

{

  uint8x8x4_t ret;

  __builtin_aarch64_simd_xi __o;

  __o = __builtin_aarch64_ld4v8qi ((const __builtin_aarch64_simd_qi *) __a);

 838:	910283a1 	add	x1, x29, #0xa0

 83c:	f9402fa0 	ldr	x0, [x29,#88]

 840:	0c400000 	ld4	{v0.8b-v3.8b}, [x0]

 844:	4c002020 	st1	{v0.16b-v3.16b}, [x1]

  ret.val[0] = (uint8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 0);

 848:	910283a0 	add	x0, x29, #0xa0  //x0=x29+0xa0

 84c:	4c402000 	ld1	{v0.16b-v3.16b}, [x0]

 850:	910043a0 	add	x0, x29, #0x10

 854:	4c002000 	st1	{v0.16b-v3.16b}, [x0]

 858:	910043a0 	add	x0, x29, #0x10

 85c:	3dc00000 	ldr	q0, [x0]

 860:	910183a0 	add	x0, x29, #0x60

 864:	fd000000 	str	d0, [x0]

  ret.val[1] = (uint8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 1);

 868:	910283a0 	add	x0, x29, #0xa0

 86c:	4c402000 	ld1	{v0.16b-v3.16b}, [x0]

 870:	910043a0 	add	x0, x29, #0x10

 874:	4c002000 	st1	{v0.16b-v3.16b}, [x0]

 878:	910083a0 	add	x0, x29, #0x20

 87c:	3dc00000 	ldr	q0, [x0]

 880:	910183a0 	add	x0, x29, #0x60

 884:	91002000 	add	x0, x0, #0x8

 888:	fd000000 	str	d0, [x0]

  ret.val[2] = (uint8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 2);

 88c:	910283a0 	add	x0, x29, #0xa0

 890:	4c402000 	ld1	{v0.16b-v3.16b}, [x0]

 894:	910043a0 	add	x0, x29, #0x10

 898:	4c002000 	st1	{v0.16b-v3.16b}, [x0]

 89c:	9100c3a0 	add	x0, x29, #0x30

 8a0:	3dc00000 	ldr	q0, [x0]

 8a4:	910183a0 	add	x0, x29, #0x60

 8a8:	91004000 	add	x0, x0, #0x10

 8ac:	fd000000 	str	d0, [x0]

  ret.val[3] = (uint8x8_t) __builtin_aarch64_get_dregxiv8qi (__o, 3);

 8b0:	910283a0 	add	x0, x29, #0xa0

 8b4:	4c402000 	ld1	{v0.16b-v3.16b}, [x0]

 8b8:	910043a0 	add	x0, x29, #0x10

 8bc:	4c002000 	st1	{v0.16b-v3.16b}, [x0]

 8c0:	910103a0 	add	x0, x29, #0x40

 8c4:	3dc00000 	ldr	q0, [x0]

 8c8:	910183a0 	add	x0, x29, #0x60

 8cc:	91006000 	add	x0, x0, #0x18

 8d0:	fd000000 	str	d0, [x0]