VHDL实例化定义错误
b2v_inst1: LS74160_1
PORT MAP(CLK => SYNTHESIZED_WIRE_135,
ENT => SYNTHESIZED_WIRE_136,
A => SYNTHESIZED_WIRE_137,
B => SYNTHESIZED_WIRE_137,
C => SYNTHESIZED_WIRE_137,
D => SYNTHESIZED_WIRE_137,
LDN => SYNTHESIZED_WIRE_136,
ENP => SYNTHESIZED_WIRE_136,
CLRN => SYNTHESIZED_WIRE_136,
RCO => SYNTHESIZED_WIRE_139);
Error (12006): Node instance "b2v_inst1" instantiates undefined entity "LS74160_1"