LPC1768+DM9161AEP+裸机运行的TCP服务器

枫中眸zc 2019-06-28 10:44:11

需要的大致目标如上。
在网上找到easyweb的一个相关例程，这是基于MCB1700的LPC1768+DP83848C的网页服务器，我只是将这份程序驱动部分的MACID按照手册修改（#define DP83848C_ID 0x0180B8A0//0x20005C90 /* PHY Identifier*/），将IP地址、子网掩码、网关地址均修改了，再链接TCPIP测试软件，连接成功过两次，后来一直连接不上，怀疑是配置不对，但是又通讯成功过。。。
折腾几天有点晕了，不知道能不能请大佬们指导下呢？可以的话，更希望线上远程有偿指导，尽管私信我，谢谢！

void Init_EMAC(void)
{
// Keil: function modified to access the EMAC
// Initializes the EMAC ethernet controller
unsigned int regv,tout,id1,id2,i,PHYID;

/* Power Up the EMAC controller. */
LPC_SC->PCONP |= 0x40000000;
/* Enable P1 Ethernet Pins. */
// if (MAC_MODULEID == OLD_EMAC_MODULE_ID) {
/* For the first silicon rev.'-' ID P1.6 should be set. */
// LPC_PINCON->PINSEL2 = 0x50151105;
// }
// else {
/* on rev. 'A' and later, P1.6 should NOT be set. */
LPC_PINCON->PINSEL2 |= 0x50150105;
// }
LPC_PINCON->PINSEL3 = (LPC_PINCON->PINSEL3 & ~0x0000000F) | 0x00000005;

/* Reset all EMAC internal modules. */
LPC_EMAC->MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX | MAC1_SIM_RES | MAC1_SOFT_RES;
// MAC_COMMAND = CR_REG_RES | CR_TX_RES | CR_RX_RES;
LPC_EMAC->Command = CR_REG_RES | CR_TX_RES | CR_RX_RES | CR_PASS_RUNT_FRM;

/* A short delay after reset. */
for (tout = 100; tout; tout--);

/* Initialize MAC control registers. */
LPC_EMAC->MAC1 = MAC1_PASS_ALL;
LPC_EMAC->MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
// MAC2 = MAC2_CRC_EN | MAC2_PAD_EN | MAC2_VLAN_PAD_EN;

LPC_EMAC->MAXF = ETH_MAX_FLEN;
LPC_EMAC->CLRT = CLRT_DEF;
LPC_EMAC->IPGR = IPGR_DEF;

/* Enable Reduced MII interface. */
LPC_EMAC->Command = CR_RMII | CR_PASS_RUNT_FRM;

/* Put the DP83848C in reset mode */
write_PHY (PHY_REG_BMCR, 0x8000);

/* Wait for hardware reset to end. */
for (tout = 0; tout < 0x100000; tout++) {
regv = read_PHY (PHY_REG_BMCR);
if (!(regv & 0x8000)) {
/* Reset complete */
uart0StrSend("-Reset complete-");
break;
}
}

/* Check if this is a DP83848C PHY. */
id1 = read_PHY (PHY_REG_IDR1);
id2 = read_PHY (PHY_REG_IDR2);

// probe phy address
// for(i=0;i<32;i++)
// {
// PHYID = Read_PHY1(i , 2 );
// if(PHYID == 0X0181)
// break;
// }

sprintf(TESTZC0, "%u", id1);
sprintf(TESTZC1, "%u", id2);
sprintf(TESTZC2, "%u", DP83848C_ID);
uart0StrSend("-id1-");
uart0StrSend(TESTZC0);
uart0StrSend("-id2-");
uart0StrSend(TESTZC1);
uart0StrSend("-id3-");
uart0StrSend(TESTZC2);

if (((id1 << 16) | (id2 & 0xFFF0)) == DP83848C_ID) {
/* Configure the PHY device */
uart0StrSend("-ID-");
/* Use autonegotiation about the link speed. */
write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);
/* Wait to complete Auto_Negotiation. */
for (tout = 0; tout < 0x100000; tout++) {
regv = read_PHY (PHY_REG_BMSR);
if (regv & 0x0020) {
/* Autonegotiation Complete. */
break;
}
}
}

/* Check the link status. */
for (tout = 0; tout < 0x10000; tout++) {
regv = read_PHY (PHY_REG_STS);
if (regv & 0x0001) {
/* Link is on. */
uart0StrSend("-LINK ON-");
break;
}
}
sprintf(TESTZC3, "%u", regv);
uart0StrSend("-regv-");
uart0StrSend(TESTZC3);

/* Configure Full/Half Duplex mode. */
if (regv & 0x0004) {
/* Full duplex is enabled. */
LPC_EMAC->MAC2 |= MAC2_FULL_DUP;
LPC_EMAC->Command |= CR_FULL_DUP;
LPC_EMAC->IPGT = IPGT_FULL_DUP;
uart0StrSend("-FULL_DUP-");
}
else {
/* Half duplex mode. */
LPC_EMAC->IPGT = IPGT_HALF_DUP;
uart0StrSend("-HALF_DUP-");
}

/* Configure 100MBit/10MBit mode. */
if (regv & 0x0002) {
/* 10MBit mode. */
LPC_EMAC->SUPP = 0;
}
else {
/* 100MBit mode. */
LPC_EMAC->SUPP = SUPP_SPEED;
}

/* Set the Ethernet MAC Address registers */
LPC_EMAC->SA0 = (MYMAC_1 << 8) | MYMAC_2;
LPC_EMAC->SA1 = (MYMAC_3 << 8) | MYMAC_4;
LPC_EMAC->SA2 = (MYMAC_5 << 8) | MYMAC_6;

/* Initialize Tx and Rx DMA Descriptors */
rx_descr_init ();
tx_descr_init ();

/* Receive Broadcast and Perfect Match Packets */
LPC_EMAC->RxFilterCtrl = RFC_BCAST_EN | RFC_PERFECT_EN;

/* Enable EMAC interrupts. */
LPC_EMAC->IntEnable = INT_RX_DONE | INT_TX_DONE;

/* Reset all interrupts */
LPC_EMAC->IntClear = 0xFFFF;

/* Enable receive and transmit mode of MAC Ethernet core */
LPC_EMAC->Command |= (CR_RX_EN | CR_TX_EN);
LPC_EMAC->MAC1 |= MAC1_REC_EN;
}

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