在学习mips下的中断，异常，写作业时候遇到两个问题，请大佬帮忙！！！

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第三题，查了资料，是这么说的CPU 会**完成**那条已**finish** MEM stage的指令。然后将exception victim定位在下一条(following)指令上。那么怎么回答 2 3 问呢。

关于第四题，我查询资料，我觉得两个小问，ALU overflow都具有高优先级，请问对吗？

谢谢


3. A processor is executing code and executes a divide instruction that divides by zero.
(a)Describe in the MIPS instruction set what state needs to be saved by the hardware interrupt mechanism.
(b)Assume that the interrupt handler reads registers R5, R6, R7 and writes registers R5, R8, R10.What registers does the interrupt handler need to save?
(c)What state does the ERET instruction change?

4.An instruction takes the following synchronous exceptions: Instruction Address Exception, ALU Overflow. What should the interrupt cause be loaded with? What if that same instruction has an external interrupt pending? Explain your reasoning?