通过xilinx_linux的驱动支持PHY型号是DP83822时，能够识别phy的型号但是无法ping通

lj001or007 2019-12-25 03:17:40

过xilinx_linux的驱动支持PHY型号是DP83822时，能够识别phy的型号但是无法ping通，

不知道如何写设备树如何配置，连接方式与zedboard使用的marallmavell,88E1510完全一致，DP83822的phy地址是3启动打印如下附件所示，对应的dtb文件是使用的zynq-zed.dtb

启动打印信息如附件，还有对应的dts文件，求各位大神帮忙谢谢！

macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 27 (00:0a:35:00:01:22)
TI DP83822 10/100 Mbps PHY e000b000.ethernet-ffffffff:1f: attached PHY driver [TI DP83822 10/100 Mbps PHY] (mii_bus:phy_addr=e000b000.ethernet-ffffffff:1f, irq=POLL)

IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready

Xilinx First Stage Boot Loader
Release 2017.4 Oct 28 2019-16:56:08
Devcfg driver initialized
Silicon Version 3.1
Boot mode is SD
SD: rc= 0
SD Init Done
Flash Base Address: 0xE0100000
Reboot status register: 0x60400000
Multiboot Register: 0x0000C000
Image Start Address: 0x00000000
Partition Header Offset:0x00000C80
Partition Count: 3
Partition Number: 1
Header Dump
Image Word Len: 0x000F6EC0
Data Word Len: 0x000F6EC0
Partition Word Len:0x000F6EC0
Load Addr: 0x00000000
Exec Addr: 0x00000000
Partition Start: 0x000065D0
Partition Attr: 0x00000020
Partition Checksum Offset: 0x00000000
Section Count: 0x00000001
Checksum: 0xFFD14B7E
Bitstream
In FsblHookBeforeBitstreamDload function
PCAP:StatusReg = 0x40000A30
PCAP:device ready
PCAP:Clear done
Level Shifter Value = 0xA
Devcfg Status register = 0x40000A30
PCAP:Fabric is Initialized done
PCAP register dump:
PCAP CTRL 0xF8007000: 0x4C00E07F
PCAP LOCK 0xF8007004: 0x0000001A
PCAP CONFIG 0xF8007008: 0x00000508
PCAP ISR 0xF800700C: 0x0802000B
PCAP IMR 0xF8007010: 0xFFFFFFFF
PCAP STATUS 0xF8007014: 0x00006A30
PCAP DMA SRC ADDR 0xF8007018: 0x00100001
PCAP DMA DEST ADDR 0xF800701C: 0xFFFFFFFF
PCAP DMA SRC LEN 0xF8007020: 0x000F6EC0
PCAP DMA DEST LEN 0xF8007024: 0x000F6EC0
PCAP ROM SHADOW CTRL 0xF8007028: 0xFFFFFFFF
PCAP MBOOT 0xF800702C: 0x0000C000
PCAP SW ID 0xF8007030: 0x00000000
PCAP UNLOCK 0xF8007034: 0x757BDF0D
PCAP MCTRL 0xF8007080: 0x30800100

DMA Done !

FPGA Done !
In FsblHookAfterBitstreamDload function
Partition Number: 2
Header Dump
Image Word Len: 0x0001FC48
Data Word Len: 0x0001FC48
Partition Word Len:0x0001FC48
Load Addr: 0x04000000
Exec Addr: 0x04000000
Partition Start: 0x000FD490
Partition Attr: 0x00000010
Partition Checksum Offset: 0x00000000
Section Count: 0x00000001
Checksum: 0xF7EA3426
Application
Handoff Address: 0x04000000
In FsblHookBeforeHandoff function
SUCCESSFUL_HANDOFF
FSBL Status = 0x1

U-Boot 2018.01 (Nov 04 2019 - 14:45:31 +0800)

Model: Zynq Zed Development Board
Board: Xilinx Zynq
Silicon: v3.1
DRAM: ECC disabled 512 MiB
MMC: sdhci@e0100000: 0 (SD)
SF: Detected n25q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB
*** Warning - bad CRC, using default environment

In: serial@e0001000
Out: serial@e0001000
Err: serial@e0001000
Net: ZYNQ GEM: e000b000, phyaddr 0, interface rgmii-id
eth0: ethernet@e000b000
Hit any key to stop autoboot: 0
Zynq>
Zynq>
Zynq>
Zynq> mdio list
eth0:
1f - Generic PHY <--> ethernet@e000b000
Zynq> mii device
MII devices: 'eth0'
Current device: 'eth0'
Zynq> mii info
PHY 0x1F: OUI = 0x80028, Model = 0x24, Rev = 0x00, 10baseT, HDX
Zynq> mii dump 1f 0
0. (3100) -- PHY control register --
(8000:0000) 0.15 = 0 reset
(4000:0000) 0.14 = 0 loopback
(2040:2000) 0. 6,13 = b01 speed selection = 100 Mbps
(1000:1000) 0.12 = 1 A/N enable
(0800:0000) 0.11 = 0 power-down
(0400:0000) 0.10 = 0 isolate
(0200:0000) 0. 9 = 0 restart A/N
(0100:0100) 0. 8 = 1 duplex = full
(0080:0000) 0. 7 = 0 collision test enable
(003f:0000) 0. 5- 0 = 0 (reserved)

Zynq> mii dump 1f 1
1. (7849) -- PHY status register --
(8000:0000) 1.15 = 0 100BASE-T4 able
(4000:4000) 1.14 = 1 100BASE-X full duplex able
(2000:2000) 1.13 = 1 100BASE-X half duplex able
(1000:1000) 1.12 = 1 10 Mbps full duplex able
(0800:0800) 1.11 = 1 10 Mbps half duplex able
(0400:0000) 1.10 = 0 100BASE-T2 full duplex able
(0200:0000) 1. 9 = 0 100BASE-T2 half duplex able
(0100:0000) 1. 8 = 0 extended status
(0080:0000) 1. 7 = 0 (reserved)
(0040:0040) 1. 6 = 1 MF preamble suppression
(0020:0000) 1. 5 = 0 A/N complete
(0010:0000) 1. 4 = 0 remote fault
(0008:0008) 1. 3 = 1 A/N able
(0004:0000) 1. 2 = 0 link status
(0002:0000) 1. 1 = 0 jabber detect
(0001:0001) 1. 0 = 1 extended capabilities

Zynq> mii dump 1f 2
2. (2000) -- PHY ID 1 register --
(ffff:2000) 2.15- 0 = 8192 OUI portion

Zynq> mii dump 1f 3
3. (a240) -- PHY ID 2 register --
(fc00:a000) 3.15-10 = 40 OUI portion
(03f0:0240) 3. 9- 4 = 36 manufacturer part number
(000f:0000) 3. 3- 0 = 0 manufacturer rev. number

Zynq>

和我的设备树有没有关系呢因为，我如果用zynq-zed.dts编译出来的是无法识别DP83822的，所以我修改后
&gem0 {
status = "okay";
phy-mode = "rgmii-id";
xlnx,ptp-enet-clock = <0x69f6bcb>;
};
};

zynq-zed.dts原版如下

&gem0 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <ðernet_phy>;

ethernet_phy: ethernet-phy@0 {
reg = <0>;
device_type = "ethernet-phy";
};
};

zynq-7000.dtsi中
gem0: ethernet@e000b000 {
compatible = "cdns,zynq-gem", "cdns,gem";
reg = <0xe000b000 0x1000>;
status = "disabled";
interrupts = <0 22 4>;
clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
};
这一块我没动

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