QCM8550 rs485 能写不能读 cat 485节点会卡住

tempokill 2025-08-28 16:24:25

这是开机的log

884000.qcom,qup_uart: ttyHS1 at MMIO 0x884000 (irq = 367, base_baud = 0) is a MSM

[ 4.446498] rs485_serial>>>msm_geni_serial_probe: line=1
[ 4.446536] rs485_serial>>>msm_geni_serial_probe: rs485_en_gpio=359
[ 4.446611] rs485_serial>>>msm_geni_serial_probe: request and pull down RS485_ENABLE_GPIO gpio
[ 4.446948] msm_geni_serial 884000.qcom,qup_uart: No Shutdown config specified
[ 4.450574] msm_geni_serial 884000.qcom,qup_uart: Serial port1 added.FifoSize 64 is_console0
[ 4.461822] BPF:[133318] Invalid name_offset:2397483
[ 4.467623] msm_geni_serial 884000.qcom,qup_uart: gsi_mode:0

下面是设备树修改

		qupv3_se9_4uart: qcom,qup_uart@884000 {
			compatible = "qcom,msm-geni-serial-hs";
			reg = <0x884000 0x4000>;
			reg-names = "se_phys";
			interrupts-extended = <&intc GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>,
                      <&tlmm 63 IRQ_TYPE_LEVEL_HIGH>;
			clock-names = "se-clk";
			clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>;
			interconnect-names = "qup-core", "qup-config", "qup-memory";
			interconnects =
			<&clk_virt MASTER_QUP_CORE_2 &clk_virt SLAVE_QUP_CORE_2>,
			<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_2>,
			<&aggre2_noc MASTER_QUP_2 &mc_virt  SLAVE_EBI1>;
			qcom,rs485-en-gpio = <&tlmm 58 0x00>;
			qcom,auto-suspend-disable;
			pinctrl-names = "default", "sleep";
			pinctrl-0 = <&qupv3_se9_4uart_tx_active>, <&qupv3_se9_4uart_rx_active>;
			pinctrl-1 = <&qupv3_se9_4uart_sleep>;
			status = "disabled";
		};




	qupv3_se9_4uart_pins: qupv3_se9_4uart_pins {
		qupv3_se9_4uart_tx_active: qupv3_se9_4uart_tx_active {
			mux {
				pins = "gpio62";
				function = "qup2_se1_l2";
			};

			config {
				pins = "gpio62";
				drive-strength = <16>;
				bias-pull-up;
			};
		};

		qupv3_se9_4uart_rx_active: qupv3_se9_4uart_rx_active {
			mux {
				pins = "gpio63";
				function = "qup2_se1_l3";
			};

			config {
				pins = "gpio63";
				drive-strength = <16>;
				bias-pull-up;
			};
		};
		qupv3_se9_4uart_sleep: qupv3_se9_4uart_sleep {
			mux {
				pins = "gpio62", "gpio63";
				function = "gpio";
			};

			 config {
				pins = "gpio62", "gpio63";
				drive-strength = <2>;
				bias-pull-down;
			};
		};
	};




#if defined (ODM_PROJECT_MC940) || defined (ODM_PROJECT_SNM973)
  { QUPV3_2_SE1, QUPV3_PROTOCOL_UART_4W, QUPV3_MODE_FIFO, AC_HLOS,            TRUE,  TRUE,  FALSE },//rs485

这个是驱动修改

diff --git a/kernel_platform/msm-kernel/drivers/tty/serial/msm_geni_serial.c b/kernel_platform/msm-kernel/drivers/tty/serial/msm_geni_serial.c
index 36e9708..d744722 100644
--- a/kernel_platform/msm-kernel/drivers/tty/serial/msm_geni_serial.c
+++ b/kernel_platform/msm-kernel/drivers/tty/serial/msm_geni_serial.c
@@ -36,7 +36,12 @@
 #include <soc/qcom/boot_stats.h>
 
 static bool con_enabled = IS_ENABLED(CONFIG_SERIAL_MSM_GENI_CONSOLE_DEFAULT_ENABLED);
-
+#include <linux/of_gpio.h>
+#include <linux/err.h>
+#undef CDBG
+#define CDBG(fmt, args...) pr_debug(fmt, ##args)
+#define GPIO_HIGH 1
+#define GPIO_LOW  0
 /* UART specific GENI registers */
 #define SE_UART_LOOPBACK_CFG		(0x22C)
 #define SE_GENI_CFG_REG80		(0x240)
@@ -2399,7 +2404,28 @@
 			       msm_port->xmit_size, msm_port->cur_baud);
 	return ret;
 }
-
+//added for snm970 rs485 control by wanghao
+static int rs485_en_gpio;
+static unsigned int msm_geni_serial_tx_empty(struct uart_port *port) ;
+inline void Rs485_direction(struct uart_port *pUart_port, bool start_tx)
+{
+	if (pUart_port->line == 1){
+		if(start_tx == true){
+			if(gpio_is_valid(rs485_en_gpio)){
+				gpio_direction_output(rs485_en_gpio, GPIO_HIGH);
+				printk(KERN_ERR "rs485 en output high\n");
+				udelay(10);
+			}
+		}else{
+			if(gpio_is_valid(rs485_en_gpio)){
+				//while(!msm_geni_serial_tx_empty(pUart_port));
+				udelay(12*1000);
+				gpio_direction_output(rs485_en_gpio, GPIO_LOW);
+				printk(KERN_ERR "rs485 en output low\n");
+			}
+		}
+	}
+}
 static void msm_geni_serial_start_tx(struct uart_port *uport)
 {
 	unsigned int geni_m_irq_en;
@@ -2408,7 +2434,8 @@
 	unsigned int geni_ios;
 	unsigned long long start_time;
 	static unsigned int ios_log_limit;
-
+	Rs485_direction(uport, true);//added for snm970 rs485 control
+	printk(KERN_ERR "whhhh rs485 en output high\n");
 	start_time = geni_capture_start_time(&msm_port->se, msm_port->ipc_log_kpi,
 					     __func__, msm_port->uart_kpi);
 	/* when start_tx is called with UART clocks OFF return. */
@@ -2480,6 +2507,7 @@
 	geni_capture_stop_time(&msm_port->se, msm_port->ipc_log_kpi, __func__,
 			       msm_port->uart_kpi, start_time,
 			       msm_port->xmit_size, msm_port->cur_baud);
+	//Rs485_direction(uport, false);
 	return;
 check_flow_ctrl:
 	geni_ios = geni_read_reg(uport->membase, SE_GENI_IOS);
@@ -2611,7 +2639,7 @@
 static void msm_geni_serial_stop_tx(struct uart_port *uport)
 {
 	struct msm_geni_serial_port *port = GET_DEV_PORT(uport);
-
+	Rs485_direction(uport, false);
 	if (!uart_console(uport) && device_pending_suspend(uport)) {
 		dev_err(uport->dev, "%s.Device is suspended.\n", __func__);
 		UART_LOG_DBG(port->ipc_log_misc, uport->dev,
@@ -5166,7 +5194,22 @@
 	} else {
 		line = pdev->id;
 	}
-
+	//add for snm970 rs485 control
+	printk("rs485_serial>>>%s: line=%d\n", __func__, line);	
+	if(line == 1){
+		rs485_en_gpio = of_get_named_gpio(pdev->dev.of_node, "qcom,rs485-en-gpio", 0);
+		printk("rs485_serial>>>%s: rs485_en_gpio=%d\n", __func__, rs485_en_gpio);		
+		if(gpio_is_valid(rs485_en_gpio)){
+			ret = gpio_request(rs485_en_gpio, "RS485_ENABLE_GPIO");
+			if (ret) {
+				printk("rs485_serial>>>%s: RS485_ENABLE_GPIO gpio request failed\n", __func__);				
+				//return ret;
+			}else {
+				gpio_direction_output(rs485_en_gpio, GPIO_LOW);
+				printk("rs485_serial>>>%s: request and pull down RS485_ENABLE_GPIO gpio\n", __func__);				
+			}
+		}
+	}
 	if (!(drv->cons)) {
 		snprintf(boot_marker, sizeof(boot_marker),
 			 "M - DRIVER GENI_HS_UART_%d Init", line);

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